[ol7_developer_EPEL] iverilog-10_2-2.el7.aarch64

Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard.

Changelog (Show File list) (Show related packages)

• Tue Apr 10 2018 Filipe Rosset <rosset.filipe@gmail.com> - 10_2-2

  - spec cleanup (thanks to Vasiliy N. Glazov <vascom2@gmail.com)

• Mon Apr 09 2018 Filipe Rosset <rosset.filipe@gmail.com> - 10_2-1

  - update to latest 10_2 upstream version + spec cleanup

• Wed Feb 07 2018 Fedora Release Engineering <releng@fedoraproject.org> - 10-8

  - Rebuilt for https://fedoraproject.org/wiki/Fedora_28_Mass_Rebuild

• Wed Aug 09 2017 Filipe Rosset <rosset.filipe@gmail.com> - 10-7

  - rebuilt

• Wed Aug 02 2017 Fedora Release Engineering <releng@fedoraproject.org> - 10-6

  - Rebuilt for https://fedoraproject.org/wiki/Fedora_27_Binutils_Mass_Rebuild

• Wed Jul 26 2017 Fedora Release Engineering <releng@fedoraproject.org> - 10-5

  - Rebuilt for https://fedoraproject.org/wiki/Fedora_27_Mass_Rebuild

• Fri Feb 10 2017 Fedora Release Engineering <releng@fedoraproject.org> - 10-4

  - Rebuilt for https://fedoraproject.org/wiki/Fedora_26_Mass_Rebuild

• Thu Jan 12 2017 Igor Gnatenko <ignatenko@redhat.com> - 10-3

  - Rebuild for readline 7.x

• Thu Feb 04 2016 Fedora Release Engineering <releng@fedoraproject.org> - 10-2

  - Rebuilt for https://fedoraproject.org/wiki/Fedora_24_Mass_Rebuild

• Wed Nov 11 2015 Kiara Navarro <sophiekovalevsky@fedoraproject.org> - 10-1

  - Bump to upstream version.