| Name: | microcode_ctl | 
  | Epoch: | 4 | 
  | Version: | 20191115 | 
  | Release: | 4.20200602.2.0.1.el8_2 | 
  | Architecture: | x86_64 | 
  
  | Group: | Unspecified | 
  
  | Size: | 3245024 | 
  | License: | CC0 and Redistributable, no modification permitted | 
  
    | RPM: | 
    
      
      microcode_ctl-20191115-4.20200602.2.0.1.el8_2.x86_64.rpm
      
     | 
  
  
    | Source RPM: | 
    
      
      microcode_ctl-20191115-4.20200602.2.0.1.el8_2.src.rpm
      
     | 
  
  | Build Date: | Wed Jun 10 2020 | 
  | Build Host: | jenkins-10-147-72-125-66d78a24-1c57-456e-95c2-1641e0a98432.appad1iad.osdevelopmeniad.oraclevcn.com | 
  | Vendor: | Oracle America | 
  | URL: | https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files | 
  | Summary: | CPU microcode updates for Intel x86 processors | 
  | Description: | This package provides microcode update files for Intel x86 and x86_64 CPUs.
The microcode update is volatile and needs to be uploaded on each system
boot i.e. it isn't stored on a CPU permanently; reboot and it reverts
back to the old microcode.
Package name "microcode_ctl" is historical, as the binary with the same name
is no longer used for microcode upload and, as a result, no longer provided.  | 
  
  - 
    Tue Jun 09 2020 Todd Vierling <todd.vierling@oracle.com> - 4:20191115-4.20200602.2.0.1
    
- add support for UEK6 kernels
- remove no longer appropriate caveats for 06-2d-07 and 06-55-04
   
  
  - 
    Thu Jun 04 2020 Eugene Syromiatnikov <esyr@redhat.com> - 4:20191115-4.20200602.2
    
- Avoid temporary file creation, used for here-documents in check_caveats.
   
  
  - 
    Wed Jun 03 2020 Eugene Syromiatnikov <esyr@redhat.com> - 4:20191115-4.20200602.1
    
- Update Intel CPU microcode to microcode-20200602 release, addresses
  CVE-2020-0543, CVE-2020-0548, CVE-2020-0549 (#1827183):
  - Update of 06-2d-06/0x6d (SNB-E/EN/EP C1/M0) microcode from revision 0x61f
    up to 0x621;
  - Update of 06-2d-07/0x6d (SNB-E/EN/EP C2/M1) microcode from revision 0x718
    up to 0x71a;
  - Update of 06-3c-03/0x32 (HSW C0) microcode from revision 0x27 up to 0x28;
  - Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from revision 0x2e
    up to 0x2f;
  - Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from revision 0x25
    up to 0x26;
  - Update of 06-46-01/0x32 (HSW-H C0) microcode from revision 0x1b up to 0x1c;
  - Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode from revision 0x21
    up to 0x22;
  - Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xd6
    up to 0xdc;
  - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000151
    up to 0x1000157;
  - Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1) microcode
    (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2000065
    up to 0x2006906;
  - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400002c
    up to 0x4002f01;
  - Update of 06-55-07/0xbf (CLX-SP B1) microcode from revision 0x500002c
    up to 0x5002f01;
  - Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from revision 0xd6
    up to 0xdc;
  - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x46
    up to 0x78;
  - Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from revision 0xca
    up to 0xd6;
  - Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xca
    up to 0xd6;
  - Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from revision 0xca
    up to 0xd6;
  - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xca
    up to 0xd6;
  - Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U V0) microcode
    from revision 0xca up to 0xd6;
  - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision
    0xca up to 0xd6;
  - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode from revision 0xca
    up to 0xd6;
  - Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xca up to 0xd6;
  - Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from revision 0xca
    up to 0xd6;
  - Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xca up to 0xd6.
- Change the URL to point to the GitHub repository since the microcode download
  section at Intel Download Center does not exist anymore.
   
  
  - 
    Wed Jun 03 2020 Eugene Syromiatnikov <esyr@redhat.com> - 4:20191115-4.20191115.6
    
- Narrow down SKL-SP/W/X blacklist to exclude Server/FPGA/Fabric segment
  models.
   
  
  - 
    Wed Jun 03 2020 Eugene Syromiatnikov <esyr@redhat.com> - 4:20191115-4.20191115.5
    
- Re-generate initramfs not only for the currently running kernel,
  but for several recently installed kernels as well.
   
  
  - 
    Mon Dec 09 2019 Eugene Syromiatnikov <esyr@redhat.com> - 4:20191115-4
    
- Avoid find being SIGPIPE'd on early "grep -q" exit in the dracut script
  (#1781365).
   
  
  - 
    Mon Dec 02 2019 Eugene Syromiatnikov <esyr@redhat.com> - 4:20191115-3
    
- Update stale posttrans dependency, add triggers for proper handling
  of the debug kernel flavour along with kernel-rt (#1766178).
   
  
  - 
    Mon Nov 18 2019 Eugene Syromiatnikov <esyr@redhat.com> - 4:20191115-2
    
- Do not update 06-55-04 (SKL-SP/W/X) to revision 0x2000065, use 0x2000064
  by default (#1774322).
   
  
  - 
    Sat Nov 16 2019 Eugene Syromiatnikov <esyr@redhat.com> - 4:20191115-1
    
- Update Intel CPU microcode to microcode-20191115 release:
  - Update of 06-4e-03/0xc0 (SKL-U/Y D0) from revision 0xd4 up to 0xd6;
  - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 R0/N0) from revision 0xd4
    up to 0xd6;
  - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) from revision 0xc6 up to 0xca;
  - Update of 06-8e-09/0xc0 (KBL-U/Y H0) from revision 0xc6 up to 0xca;
  - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0) from revision 0xc6 up to 0xca;
  - Update of 06-8e-0b/0xd0 (WHL-U W0) from revision 0xc6 up to 0xca;
  - Update of 06-8e-0c/0x94 (AML-Y V0, CML-U 4+2 V0, WHL-U V0) from revision
    0xc6 up to 0xca;
  - Update of 06-9e-09/0x2a (KBL-G/X H0, KBL-H/S/Xeon E3 B0) from revision 0xc6
    up to 0xca;
  - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) from revision 0xc6 up to 0xca;
  - Update of 06-9e-0b/0x02 (CFL-S B0) from revision 0xc6 up to 0xca;
  - Update of 06-9e-0c/0x22 (CFL-S/Xeon E P0) from revision 0xc6 up to 0xca;
  - Update of 06-9e-0d/0x22 (CFL-H/S R0) from revision 0xc6 up to 0xca;
  - Update of 06-a6-00/0x80 (CML-U 6+2 A0) from revision 0xc6 up to 0xca.
   
  
  - 
    Fri Nov 15 2019 Eugene Syromiatnikov <esyr@redhat.com> - 4:20191113-1
    
- Update Intel CPU microcode to microcode-20191113 release:
  - Update of 06-9e-0c (CFL-H/S P0) microcode from revision 0xae up to 0xc6.
- Drop 0001-releasenote-changes-summary-fixes.patch.